[mvapich-discuss] CPU Binding Policy
vaibhav dutt
vaibhavsupersaiyan9 at gmail.com
Thu Jun 9 14:24:41 EDT 2011
Hi,
I am trying to execute an application on an 8 node cluster, where each node
has two Intel Xeon quad cores.
I have one doubt regarding the CPU binding policy. Below is the output I got
by using hwloc for my node's topology.
Machine (16GB)
Socket L#0
L2 L#0 (6144KB)
L1 L#0 (32KB) + Core L#0 + PU L#0 (P#0)
L1 L#1 (32KB) + Core L#1 + PU L#1 (P#4)
L2 L#1 (6144KB)
L1 L#2 (32KB) + Core L#2 + PU L#2 (P#2)
L1 L#3 (32KB) + Core L#3 + PU L#3 (P#6)
Socket L#1
L2 L#2 (6144KB)
L1 L#4 (32KB) + Core L#4 + PU L#4 (P#1)
L1 L#5 (32KB) + Core L#5 + PU L#5 (P#5)
L2 L#3 (6144KB)
L1 L#6 (32KB) + Core L#6 + PU L#6 (P#3)
L1 L#7 (32KB) + Core L#7 + PU L#7 (P#7)
If I use block rank placement and scatter CPU binding policy, then do the
odd ranks would be placed on on odd numbered cores and even ranks on
even numbered cores?
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