[mvapich-discuss] Announcing the release of MVAPICH2-MIC 2.0

[Panda, Dhabaleswar]

The MVAPICH team is pleased to announce the release of MVAPICH2-MIC
2.0. This version of MVAPICH2 is specifically optimized for InfiniBand
clusters with Intel-MICs (Xeon Phis).

Features and Enhancements for MVAPICH2-MIC 2.0 are listed here.

* Features and Enhancements:

    - Based on MVAPICH2 2.0.1
    - Support for native, symmetric and offload modes of MIC usage
    - Optimized intra-MIC communication using SCIF and shared-memory channels
    - Optimized intra-Node Host-to-MIC communication using SCIF and IB channels
    - Enhanced mpirun_rsh to launch jobs in symmetric mode from the host
    - Support for proxy-based communication for inter-node transfers
        - Active-proxy, 1-hop and 2-hop designs (actively using host CPU)
        - Passive-proxy (passively using host CPU)
    - Support for MIC-aware MPI_Bcast()
    - Improved SCIF performance for pipelined communication
    - Optimized shared-memory communication performance for single-MIC jobs
    - Supports an explicit CPU-binding mechanism for MIC processes
    - Tuned pt-to-pt intra-MIC, intra-node, and inter-node transfers
    - Supports hwloc v1.9

Sample performance numbers for this release can be viewed by visiting
`Performance' section of the project's web page.

For downloading MVAPICH2-MIC 2.0, associated README and INSTALL files,
please visit the following URL:

http://mvapich.cse.ohio-state.edu

All questions, feedback, bug reports, hints for performance tuning,
suggestions and recommendations are welcome. Please post it to the
mvapich-discuss mailing list (mvapich-discuss at cse.ohio-state.edu).

Thanks,

The MVAPICH Team

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